Level Shifted Discontinuous PWM Algorithms to Minimize Common Mode Voltage for Cascaded Multilevel Inverter Fed Induction Motor Drive

This paper presents combinations of level shifted pulse-width modulation algorithm with conventional discontinuous pulse-width modulation methods for cascaded multilevel inverters. In the proposed DPWM a zero sequence signal is injected in sinusoidal reference signal to generate various modulators w...

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Main Authors: Nayeemuddin, M. (Author), Reddy, T. Bramhananda (Author), Kumar, M. Vijaya (Author)
Outros Autores: G. Pulla Reddy Engineering College (Contributor)
Formato: EJournal Article
Publicado em: Institute of Advanced Engineering and Science, 2018-06-01.
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