Level Shifted Discontinuous PWM Algorithms to Minimize Common Mode Voltage for Cascaded Multilevel Inverter Fed Induction Motor Drive
This paper presents combinations of level shifted pulse-width modulation algorithm with conventional discontinuous pulse-width modulation methods for cascaded multilevel inverters. In the proposed DPWM a zero sequence signal is injected in sinusoidal reference signal to generate various modulators w...
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| 格式: | EJournal Article |
| 出版: |
Institute of Advanced Engineering and Science,
2018-06-01.
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| 索引号: |
A1234.567 |
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| 复印件 1 | 可用 |