Linearity improvement of differential CMOS low noise amplifier

This paper presents the linearity improvement of differential CMOS low noise amplifier integrated circuit using 0.13um CMOS technology. In this study, inductively degenerated common source topology is adopted for wireless LAN application. The linearity of the single-ended LNA was improved by using d...

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Main Authors: Muhamad, Maizan (Author), Soin, Norhayati (Author), Ramiah, Harikrishnan (Author)
Format: EJournal Article
Published: Institute of Advanced Engineering and Science, 2019-04-01.
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LEADER 02000 am a22003133u 4500
001 ijeecs17164_11533
042 |a dc 
100 1 0 |a Muhamad, Maizan  |e author 
100 1 0 |e contributor 
700 1 0 |a Soin, Norhayati  |e author 
700 1 0 |a Ramiah, Harikrishnan  |e author 
245 0 0 |a Linearity improvement of differential CMOS low noise amplifier 
260 |b Institute of Advanced Engineering and Science,   |c 2019-04-01. 
500 |a https://ijeecs.iaescore.com/index.php/IJEECS/article/view/17164 
520 |a This paper presents the linearity improvement of differential CMOS low noise amplifier integrated circuit using 0.13um CMOS technology. In this study, inductively degenerated common source topology is adopted for wireless LAN application. The linearity of the single-ended LNA was improved by using differential structures with optimum biasing technique. This technique achieved better LNA and linearity performance compare with single-ended structure. Simulation was made by using the cadence spectre RF tool. Consuming 5.8mA current at 1.2V supply voltage, the designed LNA exhibits S21 gain of 18.56 dB, noise figure (NF) of 1.85 dB, S11 of −27.63 dB, S22 of -34.33 dB, S12 of −37.09 dB and IIP3 of -7.79 dBm. 
540 |a Copyright (c) 2018 Institute of Advanced Engineering and Science 
540 |a http://creativecommons.org/licenses/by-nc/4.0 
546 |a eng 
690
690 |a CMOS, Low Noise Amplifier (LNA), Linearity, Noise Figure (NF), differential 
655 7 |a info:eu-repo/semantics/article  |2 local 
655 7 |a info:eu-repo/semantics/publishedVersion  |2 local 
655 7 |2 local 
786 0 |n Indonesian Journal of Electrical Engineering and Computer Science; Vol 14, No 1: April 2019; 407-412 
786 0 |n 2502-4760 
786 0 |n 2502-4752 
786 0 |n 10.11591/ijeecs.v14.i1 
787 0 |n https://ijeecs.iaescore.com/index.php/IJEECS/article/view/17164/11533 
856 4 1 |u https://ijeecs.iaescore.com/index.php/IJEECS/article/view/17164/11533  |z Get fulltext