Implementation of digital and analog modulation systems using FPGA
FPGA (Field Programmable Gate Array) based implementations of digital and analog modulation techniques play a vital rule in the design of signal processing system. The performance and flexibility provided by reconfigurable computing speeds up the development process in signal processing implementati...
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| Main Authors: | , |
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| Format: | EJournal Article |
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Institute of Advanced Engineering and Science,
2020-04-01.
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| Online Access: | Get fulltext |
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| LEADER | 02324 am a22003013u 4500 | ||
|---|---|---|---|
| 001 | ijeecs19033_13653 | ||
| 042 | |a dc | ||
| 100 | 1 | 0 | |a Mohammed, Raya Kahtan |e author |
| 100 | 1 | 0 | |e contributor |
| 700 | 1 | 0 | |a Abdullah, Hamsa Abdulkareem |e author |
| 245 | 0 | 0 | |a Implementation of digital and analog modulation systems using FPGA |
| 260 | |b Institute of Advanced Engineering and Science, |c 2020-04-01. | ||
| 500 | |a https://ijeecs.iaescore.com/index.php/IJEECS/article/view/19033 | ||
| 520 | |a FPGA (Field Programmable Gate Array) based implementations of digital and analog modulation techniques play a vital rule in the design of signal processing system. The performance and flexibility provided by reconfigurable computing speeds up the development process in signal processing implementations using FPGA. Different methods for digital and analog modulation are designed in this paper by usinSg System Generator tools & Vivado. Then all designed systems are implemented successfully in an FPGA hardware via the NEXYS 4 DDR with ARTIX 7 XC7A100T. A comparison between five types of digital modulation techniques is discussed in terms of resources utilization in FPGA hardware. And also, the implementation of analog modulations in FPGA is contributed in this work. The hardware implementation shows that the number of slice LUTs in ASK modulation is 0.07% while in FSK modulation is 0.13% of the total number of slice LUTs. And also, the number of bounded IO that used for PSK modulation is 4.8% while in PM modulation is 61.4% of the total number bounded IO. | ||
| 540 | |a Copyright (c) 2020 Institute of Advanced Engineering and Science | ||
| 540 | |a http://creativecommons.org/licenses/by-nc/4.0 | ||
| 546 | |a eng | ||
| 690 | |||
| 690 | |a FPGA, Digital modulation, Analog modulation, System generator, Vivado | ||
| 655 | 7 | |a info:eu-repo/semantics/article |2 local | |
| 655 | 7 | |a info:eu-repo/semantics/publishedVersion |2 local | |
| 655 | 7 | |2 local | |
| 786 | 0 | |n Indonesian Journal of Electrical Engineering and Computer Science; Vol 18, No 1: April 2020; 485-493 | |
| 786 | 0 | |n 2502-4760 | |
| 786 | 0 | |n 2502-4752 | |
| 786 | 0 | |n 10.11591/ijeecs.v18.i1 | |
| 787 | 0 | |n https://ijeecs.iaescore.com/index.php/IJEECS/article/view/19033/13653 | |
| 856 | 4 | 1 | |u https://ijeecs.iaescore.com/index.php/IJEECS/article/view/19033/13653 |z Get fulltext |