Design and implementation of fast floating point units for FPGAs
Due to growth in demand for high-performance applications that require high numerical stability and accuracy, the need for floating-point FPGA has been increased. In this work, an open-source and efficient floating-point unit is implemented on a standard Xilinx Sparton-6 FPGA platform. The proposed...
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| Main Authors: | , , |
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| Format: | EJournal Article |
| Published: |
Institute of Advanced Engineering and Science,
2020-09-01.
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| Subjects: | |
| Online Access: | Get fulltext |
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| Summary: | Due to growth in demand for high-performance applications that require high numerical stability and accuracy, the need for floating-point FPGA has been increased. In this work, an open-source and efficient floating-point unit is implemented on a standard Xilinx Sparton-6 FPGA platform. The proposed design is described in a hierarchal way starting from functional block descriptions toward modules level design. Our implementation used minimal resources available on the targeting FPGA board, tested on Sparton-6 FPGA platform and verified on ModelSim. The open-source framework can be embedded or customized for low-cost FPGA devices that do not offer floating-point units. |
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| Item Description: | https://ijeecs.iaescore.com/index.php/IJEECS/article/view/21445 |