Design and analysis of RNS-based sign detector for moduli set {2^n, 2^n - 1, 2^n + 1}
Magnitude comparison, sign detection and overflow detection are essential operations of residue number system (RNS) that are used in digital signal processing (DSP) applications. Moreover, sign detection attracts significant attention in RNS as it can also be used in division and magnitude compariso...
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| Format: | EJournal Article |
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Institute of Advanced Engineering and Science,
2021-04-01.
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| LEADER | 02305 am a22003013u 4500 | ||
|---|---|---|---|
| 001 | ijeecs23310_14788 | ||
| 042 | |a dc | ||
| 100 | 1 | 0 | |a Kumar, Raj |e author |
| 100 | 1 | 0 | |e contributor |
| 700 | 1 | 0 | |a Mishra, Ram Awadh |e author |
| 245 | 0 | 0 | |a Design and analysis of RNS-based sign detector for moduli set {2^n, 2^n - 1, 2^n + 1} |
| 260 | |b Institute of Advanced Engineering and Science, |c 2021-04-01. | ||
| 500 | |a https://ijeecs.iaescore.com/index.php/IJEECS/article/view/23310 | ||
| 520 | |a Magnitude comparison, sign detection and overflow detection are essential operations of residue number system (RNS) that are used in digital signal processing (DSP) applications. Moreover, sign detection attracts significant attention in RNS as it can also be used in division and magnitude comparison operations. However, these operations are not easy to perform in RNS. So, there is a need arise to propose a computationally advanced RNS based sign detector. This paper presents an area and power-efficient sign detection circuit for modulo {2n - 1, 2n, 2n + 1} using mixed radix conversion technique. The proposed sign detector is constructed using a carry save adder (CSA), a modified parallel prefix adder and a carry-generation circuit. Based on the synthesized results using synopsys design compiler, the introduced design offers better results in terms of the area required and power consumption. Although, the speed will remain the same when compared to the recent sign detectors for the same moduli set. | ||
| 540 | |a Copyright (c) 2021 Institute of Advanced Engineering and Science | ||
| 540 | |a http://creativecommons.org/licenses/by-nc/4.0 | ||
| 546 | |a eng | ||
| 690 | |||
| 690 | |a Digital Signal Processing; Mixed radix conversion (MRC); Residue Number System; Sign detection; VLSI design | ||
| 655 | 7 | |a info:eu-repo/semantics/article |2 local | |
| 655 | 7 | |a info:eu-repo/semantics/publishedVersion |2 local | |
| 655 | 7 | |2 local | |
| 786 | 0 | |n Indonesian Journal of Electrical Engineering and Computer Science; Vol 22, No 1: April 2021; 62-70 | |
| 786 | 0 | |n 2502-4760 | |
| 786 | 0 | |n 2502-4752 | |
| 786 | 0 | |n 10.11591/ijeecs.v22.i1 | |
| 787 | 0 | |n https://ijeecs.iaescore.com/index.php/IJEECS/article/view/23310/14788 | |
| 856 | 4 | 1 | |u https://ijeecs.iaescore.com/index.php/IJEECS/article/view/23310/14788 |z Get fulltext |