An efficient look up table based approximate adder for field programmable gate array

The approximate computing is an alternative computing approach which can lead to high-performance implementation of audio and image processing as well as deep learning applications. However, most of the available approximate adders have been designed using application specific integrated circuits (A...

Full description

Saved in:
Bibliographic Details
Main Authors: Ramezani, Hadise (Author), Mohammadi, Majid (Author), Molahosseini, Amir Sabbagh (Author)
Format: EJournal Article
Published: Institute of Advanced Engineering and Science, 2022-01-01.
Subjects:
Online Access:Get fulltext
Tags: Add Tag
No Tags, Be the first to tag this record!
LEADER 02267 am a22003133u 4500
001 ijeecs25515_16004
042 |a dc 
100 1 0 |a Ramezani, Hadise  |e author 
100 1 0 |e contributor 
700 1 0 |a Mohammadi, Majid  |e author 
700 1 0 |a Molahosseini, Amir Sabbagh  |e author 
245 0 0 |a An efficient look up table based approximate adder for field programmable gate array 
260 |b Institute of Advanced Engineering and Science,   |c 2022-01-01. 
500 |a https://ijeecs.iaescore.com/index.php/IJEECS/article/view/25515 
520 |a The approximate computing is an alternative computing approach which can lead to high-performance implementation of audio and image processing as well as deep learning applications. However, most of the available approximate adders have been designed using application specific integrated circuits (ASICs), and they would not result in an efficient implementation on field programmable gate arrays (FPGAs). In this paper, we have designed a new approximate adder customized for efficient implementation on FPGAs, and then it has been used to build the Gaussian filter. The experimental results of the implementation of Gaussian filter based on the proposed approximate adder on a Virtex-7 FPGA, indicated that the resource utilization has decreased by 20-51%, and the designed filter delay based on the modified design methodology for building approximate adders for FPGA-based systems (MDeMAS) adder has improved 10-35%, due to the obtained output quality. 
540 |a Copyright (c) 2021 Institute of Advanced Engineering and Science 
540 |a http://creativecommons.org/licenses/by-nc/4.0 
546 |a eng 
690
690 |a Adders; Approximate computing; FPGA; Gaussian smoothing filter; LUTs; 
655 7 |a info:eu-repo/semantics/article  |2 local 
655 7 |a info:eu-repo/semantics/publishedVersion  |2 local 
655 7 |2 local 
786 0 |n Indonesian Journal of Electrical Engineering and Computer Science; Vol 25, No 1: January 2022; 144-151 
786 0 |n 2502-4760 
786 0 |n 2502-4752 
786 0 |n 10.11591/ijeecs.v25.i1 
787 0 |n https://ijeecs.iaescore.com/index.php/IJEECS/article/view/25515/16004 
856 4 1 |u https://ijeecs.iaescore.com/index.php/IJEECS/article/view/25515/16004  |z Get fulltext