A Study on Sub-pixel Interpolation Filtering Algorithm and Hardware Structural Design Aiming at HEVC

Aiming at the new-generation video compression standard being formulated-HEVC, a kind of sub-pixel interpolation filtering algorithm is proposed (luminance: 1/4 precision, chrominance: 1/8 precision). Based on the algorithm, a hardware design with pipeline structure and high degree of parallelism is...

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Main Authors: Gang, Wang (Author), Hexin, Chen (Author), Mianshu, Chen (Author), Yuanyuan, Liu (Author)
Format: EJournal Article
Published: Institute of Advanced Engineering and Science, 2013-12-01.
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042 |a dc 
100 1 0 |a Gang, Wang  |e author 
100 1 0 |e contributor 
700 1 0 |a Hexin, Chen  |e author 
700 1 0 |a Mianshu, Chen  |e author 
700 1 0 |a Yuanyuan, Liu  |e author 
245 0 0 |a A Study on Sub-pixel Interpolation Filtering Algorithm and Hardware Structural Design Aiming at HEVC 
260 |b Institute of Advanced Engineering and Science,   |c 2013-12-01. 
520 |a Aiming at the new-generation video compression standard being formulated-HEVC, a kind of sub-pixel interpolation filtering algorithm is proposed (luminance: 1/4 precision, chrominance: 1/8 precision). Based on the algorithm, a hardware design with pipeline structure and high degree of parallelism is put forward. The hardware overhead is reduced by multiplex Wiener filter and the reduction of the size of register array. And the interpolation order of vertical priority is adopted to reduce the reading bandwidth of the storage. It is indicated from the performance analysis that this interpolation structure possesses better performance and smaller hardware overhead. This design also takes full consideration of the balance between speed and area, meeting the requirements of processing standard definition and high definition video image. DOI: http://dx.doi.org/10.11591/telkomnika.v11i12.3676 
540 |a Copyright (c) 2013 Institute of Advanced Engineering and Science 
540 |a http://creativecommons.org/licenses/by-nc-nd/4.0 
546 |a eng 
690 |a Sub-pixel Interpolation; Hardware Framework; HEVC; H.264 
655 7 |a info:eu-repo/semantics/article  |2 local 
655 7 |a info:eu-repo/semantics/publishedVersion  |2 local 
655 7 |2 local 
786 0 |n Indonesian Journal of Electrical Engineering and Computer Science; Vol 11, No 12: December 2013; 7564-7570 
786 0 |n 2502-4760 
786 0 |n 2502-4752 
786 0 |n 10.11591/ijeecs.v11.i12 
787 0 |n https://ijeecs.iaescore.com/index.php/IJEECS/article/view/2941/4072 
856 4 1 |u https://ijeecs.iaescore.com/index.php/IJEECS/article/view/2941/4072  |z Get fulltext