Design and Implementation of Universal Serial Bus Transceiver with Verilog
In this paper, a simplified Universal Serial Bus (USB) transceiver is designed, which is special used for mobile terminals such as smart mobile phone, IPad, smart sensor, and so on. The transceiver includes functions such as data serialization, bit stuffing, NRZI encoding and NRZI decoding, bit unst...
Saved in:
| Main Authors: | , , , |
|---|---|
| Format: | EJournal Article |
| Published: |
Institute of Advanced Engineering and Science,
2014-06-01.
|
| Subjects: | |
| Online Access: | Get fulltext |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | In this paper, a simplified Universal Serial Bus (USB) transceiver is designed, which is special used for mobile terminals such as smart mobile phone, IPad, smart sensor, and so on. The transceiver includes functions such as data serialization, bit stuffing, NRZI encoding and NRZI decoding, bit unstuffing, deserialization. The transceiver is designed and implemented with Verilog HDL in Modelsim. And the transceiver has been verified with FPGA and synthesized using 0.18um 1P6M CMOS process technology. The simulation and FPGA results show that the transceiver satisfies all design specification and can be used as an IP core for smart mobile terminals. DOI : http://dx.doi.org/10.11591/telkomnika.v12i6.5441 |
|---|