Design of 3-Bit ADC in 0.18 µm CMOS Process
Analog-to-digital converters (ADCs) are required to convert the real world analog signals into digital signals, as digital signals are more robust and easier to handle. Signal processing is increasingly being done in the digital domain along with the escalating levels of integration have forced ADC...
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| Main Authors: | , , , |
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| פורמט: | EJournal Article |
| יצא לאור: |
Institute of Advanced Engineering and Science,
2014-07-01.
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| נושאים: | |
| גישה מקוונת: | Get fulltext |
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| סיכום: | Analog-to-digital converters (ADCs) are required to convert the real world analog signals into digital signals, as digital signals are more robust and easier to handle. Signal processing is increasingly being done in the digital domain along with the escalating levels of integration have forced ADC to reside on the same chip as digital circuits. The study describes the design method of 3-bit ADC using CEDEC 0.18 μm CMOS process. The designed ADC consists of; voltage divider, comparator and 7-bit encoder circuits. The pre-simulation has done with ELDO simulator with low power supply voltage (VDD) 1.8 V. The simulated results showed that the designed 3-bit ADC is able to convert analog signals to digital signals. |
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| תאור פריט: | https://ijeecs.iaescore.com/index.php/IJEECS/article/view/3618 |