A Novel Generalized Topology for Multi-level Inverter with Switched Series-Parallel DC Sources
This paper presents a novel topology of Single-phase multilevel inverter for low and high power applications. It consists of polarity (Level) generation circuit and H Bridge to generate both positive and negative polarities. The proposed topology can produce more output voltage levels by switching d...
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Institute of Advanced Engineering and Science,
2016-10-01.
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LEADER | 02174 am a22003013u 4500 | ||
---|---|---|---|
001 | ijeecs5791_4551 | ||
042 | |a dc | ||
100 | 1 | 0 | |a Sridhar, S. |e author |
100 | 1 | 0 | |e contributor |
700 | 1 | 0 | |a Satish Kumar, P. |e author |
700 | 1 | 0 | |a Susham, M. |e author |
245 | 0 | 0 | |a A Novel Generalized Topology for Multi-level Inverter with Switched Series-Parallel DC Sources |
260 | |b Institute of Advanced Engineering and Science, |c 2016-10-01. | ||
500 | |a https://ijeecs.iaescore.com/index.php/IJEECS/article/view/5791 | ||
520 | |a This paper presents a novel topology of Single-phase multilevel inverter for low and high power applications. It consists of polarity (Level) generation circuit and H Bridge to generate both positive and negative polarities. The proposed topology can produce more output voltage levels by switching dc voltage sources in series and parallel. The proposed topology utilizes minimum number of power electronic devices which leads to the reduction of cost, size, and weight low and consumes low power which improves the efficiency. Switching pulses are generated using Phase disposition (PD) pulse width modulation technique. Finally the effectiveness of the proposed topology is verified using MATLAB/SIMULINK software tool. 7level asymmetrical multilevel inverter prototype hardware is prepared to support the proposed topology to verify the effectiveness and its validity. | ||
540 | |a Copyright (c) 2016 Institute of Advanced Engineering and Science | ||
540 | |a http://creativecommons.org/licenses/by-nc-nd/4.0 | ||
546 | |a eng | ||
690 | |a multi-level Inverter, series-parallel switches, isolated DC sources, phase disposition (PD) PWM | ||
655 | 7 | |a info:eu-repo/semantics/article |2 local | |
655 | 7 | |a info:eu-repo/semantics/publishedVersion |2 local | |
655 | 7 | |2 local | |
786 | 0 | |n Indonesian Journal of Electrical Engineering and Computer Science; Vol 4, No 1: October 2016; 41-51 | |
786 | 0 | |n 2502-4760 | |
786 | 0 | |n 2502-4752 | |
786 | 0 | |n 10.11591/ijeecs.v4.i1 | |
787 | 0 | |n https://ijeecs.iaescore.com/index.php/IJEECS/article/view/5791/4551 | |
856 | 4 | 1 | |u https://ijeecs.iaescore.com/index.php/IJEECS/article/view/5791/4551 |z Get fulltext |