Layout Effects on High Frequency and Noise Parameters in MOSFETs

This study reviews related studies on the impact of the layout dependent effects on high frequency and RF noise parameter performances, carried out over the past decade. It specifically focuses on the doughnut and multi- finger layouts. The doughnut style involves the polygonal and the 4- sided tech...

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Main Authors: Nur Aqilah Zainal Badri, Asmaa (Author), Mohd Noh, Norlaili (Author), bin Korakkottil Kunhi Mohd, Shukri (Author), Abd Manaf, Asrulnizam (Author), Marzuki, Arjuna (Author), Tafir Mustaffa, Mohd (Author)
Format: EJournal Article
Published: Institute of Advanced Engineering and Science, 2017-04-01.
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042 |a dc 
100 1 0 |a Nur Aqilah Zainal Badri, Asmaa  |e author 
100 1 0 |e contributor 
700 1 0 |a Mohd Noh, Norlaili  |e author 
700 1 0 |a bin Korakkottil Kunhi Mohd, Shukri  |e author 
700 1 0 |a Abd Manaf, Asrulnizam  |e author 
700 1 0 |a Marzuki, Arjuna  |e author 
700 1 0 |a Tafir Mustaffa, Mohd  |e author 
245 0 0 |a Layout Effects on High Frequency and Noise Parameters in MOSFETs 
260 |b Institute of Advanced Engineering and Science,   |c 2017-04-01. 
500 |a https://ijeecs.iaescore.com/index.php/IJEECS/article/view/6545 
520 |a This study reviews related studies on the impact of the layout dependent effects on high frequency and RF noise parameter performances, carried out over the past decade. It specifically focuses on the doughnut and multi- finger layouts. The doughnut style involves the polygonal and the 4- sided techniques, while the multi-finger involving the narrow-oxide diffusion (OD) and multi-OD. The polygonal versus 4-sided doughnut, and the narrow-OD with multi-fingers versus multi-OD with multi- fingers are reviewed in this study. The high frequency parameters, which are of concern in this study, are the cut- off frequency (fT) and the maximum frequency (fMAX), whereas the noise parameters involved are noise resistance (RN) and the minimum noise figure (NFmin). In addition, MOSFET parameters, which are affected by the layout style that in turn may contribute to the changes in these high frequency, and noise parameters are also detailed. Such parameters include transconductance (Gm); gate resistance (Rg); effective mobility (μeff); and parasitic capacitances (cgg and cgd). Investigation by others has revealed that the polygonal doughnut may have a larger total area in comparison with the 4- sided doughnut. It is also found by means of this review that the multi-finger layout style with narrow-OD and high number of fingers may have the best performance in fT and fMAX, owing partly to the improvement in Gm, μeff, cgg, cgd and low frequency noise (LFN). A multi-OD with a lower number of fingers may lead to a lower performance in fT due to a lower Gm. Upon comparing the doughnut and the multi-finger layout styles, the doughnuts appeared to perform better than a standard multi-finger layout for fT, fMAX, Gm and μeff but are poorer in terms of LFN. It can then be concluded that the narrow-OD multi-finger may cause the increase of cgg as the transistor becomes narrower, whereas a multi-OD multi-finger may have high Rg and therefore may lead to the increase of fT and fMAX as the transistor becomes narrower. Besides, the doughnut layout style has a higher Gm and fT, leading to larger μeff from the elimination of shallow trench isolation (STI) stress. 
540 |a Copyright (c) 2017 Indonesian Journal of Electrical Engineering and Computer Science 
540 |a http://creativecommons.org/licenses/by-nc-nd/4.0 
546 |a eng 
690
690
655 7 |a info:eu-repo/semantics/article  |2 local 
655 7 |a info:eu-repo/semantics/publishedVersion  |2 local 
655 7 |2 local 
786 0 |n Indonesian Journal of Electrical Engineering and Computer Science; Vol 6, No 1: April 2017; 88-96 
786 0 |n 2502-4760 
786 0 |n 2502-4752 
786 0 |n 10.11591/ijeecs.v6.i1 
787 0 |n https://ijeecs.iaescore.com/index.php/IJEECS/article/view/6545/6355 
856 4 1 |u https://ijeecs.iaescore.com/index.php/IJEECS/article/view/6545/6355  |z Get fulltext