An FPGA-based Network Firewall with Expandable Rule Description
With the rapid growth of communications via the Internet, the need for an effective firewall system which has not badly affect the overall network performances has been increased. In this paper, a Field Programmable Gate Array (FPGA) -based firewall system with high performance has been implemented...
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| Main Authors: | , |
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| Format: | EJournal Article |
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Institute of Advanced Engineering and Science,
2018-06-01.
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| Online Access: | Get fulltext |
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| LEADER | 02253 am a22003013u 4500 | ||
|---|---|---|---|
| 001 | ijeecs8886_8480 | ||
| 042 | |a dc | ||
| 100 | 1 | 0 | |a Mohammed, Raya kahtan |e author |
| 100 | 1 | 0 | |e contributor |
| 700 | 1 | 0 | |a UENO, Yoichiro |e author |
| 245 | 0 | 0 | |a An FPGA-based Network Firewall with Expandable Rule Description |
| 260 | |b Institute of Advanced Engineering and Science, |c 2018-06-01. | ||
| 500 | |a https://ijeecs.iaescore.com/index.php/IJEECS/article/view/8886 | ||
| 520 | |a With the rapid growth of communications via the Internet, the need for an effective firewall system which has not badly affect the overall network performances has been increased. In this paper, a Field Programmable Gate Array (FPGA) -based firewall system with high performance has been implemented using Network FPGA (NetFPGA) with Xilinx Kintex-7 XC7K325T FPGA. Based on NetFPGA reference router project, a NetFPGA-based firewall system was implemented. The hardware module performs rule matching operation using content addressable memory (CAM) for higher speed data processing. To evaluate system performance, throughput, latency, and memory utilization were measured for different cases using different tools, also the number of rules that an incoming packet is subjected to was varied to get more readings using both software and hardware features. The results showed that the designed firewall system provides better performance than traditional firewalls. System throughput was doubled times of the one with Linux-Iptables firewalls. | ||
| 540 | |a Copyright (c) 2018 Institute of Advanced Engineering and Science | ||
| 540 | |a http://creativecommons.org/licenses/by-nc-nd/4.0 | ||
| 546 | |a eng | ||
| 690 | |||
| 690 | |a Firewall; FFGA; NetFPGA; Network Performance | ||
| 655 | 7 | |a info:eu-repo/semantics/article |2 local | |
| 655 | 7 | |a info:eu-repo/semantics/publishedVersion |2 local | |
| 655 | 7 | |2 local | |
| 786 | 0 | |n Indonesian Journal of Electrical Engineering and Computer Science; Vol 10, No 3: June 2018; 1310-1318 | |
| 786 | 0 | |n 2502-4760 | |
| 786 | 0 | |n 2502-4752 | |
| 786 | 0 | |n 10.11591/ijeecs.v10.i3 | |
| 787 | 0 | |n https://ijeecs.iaescore.com/index.php/IJEECS/article/view/8886/8480 | |
| 856 | 4 | 1 | |u https://ijeecs.iaescore.com/index.php/IJEECS/article/view/8886/8480 |z Get fulltext |