Optimization of Arithmetical Operators for the Enhanced Wallace Stage
In the field of Digital signal processing (DSP), the reduction of some logical elements counts is one of the main considerations. To minimize the area, computational delay, and power, the digital form FIR filter is to be implemented. The optimization of the ATP (Area, Time and Power) is achieved by...
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Main Authors: | , |
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Format: | EJournal Article |
Published: |
Institute of Advanced Engineering and Science,
2018-03-01.
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Online Access: | Get fulltext |
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Call Number: |
A1234.567 |
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Copy 1 | Available |