ASIC design of low power-delay product carry pre-computation based multiplier

High speed and efficient multipliers are essential components in today's computational circuits like digital signal processing, algorithms for cryptography and high performance processors. Invariably, almost all processing units will contain hardware multipliers based on some algorithm that fit...

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主要な著者: CVS, Chaitanya (著者), C, Sundaresan (著者), R Venkateswaran, P (著者)
フォーマット: EJournal Article
出版事項: Institute of Advanced Engineering and Science, 2019-02-01.
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