An Optimized FPGA Implementation of CAN 2.0 Protocol Error Detection Circuitry
Controller Area Network is an ideal serial bus design suitable for modern embedded system based networks. It finds its use in most of critical applications, where error detection and subsequent treatment on error is a critical issue. CRC (Cyclic Redundancy Check) block was developed on FPGA in order...
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| Main Authors: | , |
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| Format: | EJournal Article |
| Published: |
Institute of Advanced Engineering and Science,
2017-06-01.
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| Subjects: | |
| Online Access: | Get fulltext |
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| Call Number: |
A1234.567 |
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| Copy 1 | Available |