Power Efficient Clock Distribuition for Switched Capacitor DC-DC Converters
In various VLSI based digital systems, on-chip interconnects have become the system bottleneck in state-of-the-art chips, limiting the performance of high-speed clock distributions and data communication devices in terms of propagation delay and power consumption. Increasing power requirements and p...
Tallennettuna:
| Päätekijät: | , |
|---|---|
| Aineistotyyppi: | EJournal Article |
| Julkaistu: |
Institute of Advanced Engineering and Science,
2018-04-01.
|
| Aiheet: | |
| Linkit: | Get fulltext |
| Tagit: |
Lisää tagi
Ei tageja, Lisää ensimmäinen tagi!
|
Internet
Get fulltext3rd Floor Main Library
| Hyllypaikka: |
A1234.567 |
|---|---|
| Nide 1 | Saatavissa |