A Comprehensive Review on Applications of Don't Care Bit Filling Techniques for Test Power Reduction in Digital VLSI Systems

Massive power consumption during VLSI testing is a serious threat to reliability concerns of ubiquitous silicon industry. A significant amount of low-power methodologies are proposed in the relevant literature to address this issue of test mode power consumption and don't care bit(X) filling ap...

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Hauptverfasser: Mitra, Sanjoy (VerfasserIn), Das, Debaprasad (VerfasserIn)
Weitere Verfasser: Nil (MitwirkendeR)
Format: EJournal Article
Veröffentlicht: Institute of Advanced Engineering and Science, 2018-12-01.
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