A Comprehensive Review on Applications of Don't Care Bit Filling Techniques for Test Power Reduction in Digital VLSI Systems
Massive power consumption during VLSI testing is a serious threat to reliability concerns of ubiquitous silicon industry. A significant amount of low-power methodologies are proposed in the relevant literature to address this issue of test mode power consumption and don't care bit(X) filling ap...
Tallennettuna:
| Päätekijät: | , |
|---|---|
| Muut tekijät: | |
| Aineistotyyppi: | EJournal Article |
| Julkaistu: |
Institute of Advanced Engineering and Science,
2018-12-01.
|
| Aiheet: | |
| Linkit: | Get fulltext |
| Tagit: |
Lisää tagi
Ei tageja, Lisää ensimmäinen tagi!
|
Internet
Get fulltext3rd Floor Main Library
| Hyllypaikka: |
A1234.567 |
|---|---|
| Nide 1 | Saatavissa |