A Comprehensive Review on Applications of Don't Care Bit Filling Techniques for Test Power Reduction in Digital VLSI Systems
Massive power consumption during VLSI testing is a serious threat to reliability concerns of ubiquitous silicon industry. A significant amount of low-power methodologies are proposed in the relevant literature to address this issue of test mode power consumption and don't care bit(X) filling ap...
Salvato in:
Autori principali: | , |
---|---|
Altri autori: | |
Natura: | EJournal Article |
Pubblicazione: |
Institute of Advanced Engineering and Science,
2018-12-01.
|
Soggetti: | |
Accesso online: | Get fulltext |
Tags: |
Aggiungi Tag
Nessun Tag, puoi essere il primo ad aggiungerne! !
|
Accesso online
Get fulltext3rd Floor Main Library
Collocazione: |
A1234.567 |
---|---|
Copia 1 | Disponibile |